The invention relates generally to a circuit that provides a regulated output voltage and more specifically to a circuit that uses a pulse frequency modulated technique to generate the regulated output voltage.
Many electronic applications of today require the use of circuits capable of providing a stable output voltage over a range of input voltages. Devices such as cellular telephones and personal digital assistants typically receive their power from a supply battery. As the device operates, battery power is consumed and the battery voltage changes. Consequently, if the supply voltage is not regulated, the performance of the device can change over time.
The prior art teaches many ways to accomplish this conversion. For example, some portable electronic devices use arrays of capacitors (e.g., charge pumps) to convert the source voltage into a voltage with a different polarity and/or magnitude. Other devices use switching power supplies to provide a regulated voltage for proper operation. Switching losses inherent in such supplies can limit the power efficiency.
Typically, the regulation circuit is left on when the portable electronic device goes into a sleep mode. If the light load quiescent current of the regulator circuit is not controlled effectively, the life of the supply battery is significantly reduced, even when the device is in sleep mode.
The invention relates to a circuit and method for providing a regulated output voltage. The present invention increases the amount of output current delivered to a load and reduces the amount of quiescent current used by the regulation circuit when an electronic device is in sleep mode. The circuit provides increased output current transfer to the load by applying a voltage source to an inductor until a maximum allowable current through the inductor is realized. The supply voltage is then removed from the inductor and the current is transferred to the load for at least a minimum period. The minimum period is substantially proportional to the output voltage and the supply voltage.
One aspect of the invention relates to a voltage regulation circuit. The circuit includes a feedback comparator, a latch module, a switch, a current limit module and a pulse module. The feedback comparator includes a first input terminal configured to receive a regulated output voltage, a second input terminal configured to receive a first reference voltage, and an output terminal. The feedback comparator generates a comparison signal at its output terminal in response to the regulated output voltage. The latch module includes a first input terminal in communication with the feedback comparator output terminal, a second input terminal configured to receive an off-time signal having a variable asserted duration, and an output terminal. The latch module generates a charge signal in response to the comparison signal and the off-time signal. The switch includes a control terminal in communication with the latch output terminal, a first terminal configured to receive a current level signal, and a second terminal configured to receive a second reference voltage. The current limit module includes a first input terminal in communication with the latch output terminal, a second input terminal configured to receive the current-level signal, a third input terminal configured to receive the regulated output voltage, and a current limit output terminal. The current limit module generates a peak detect signal in response to the charge signal, the regulated output voltage and the current level signal. The pulse module includes a first input terminal in communication with the current limit module output terminal, a second input terminal configured to receive a supply voltage, a third input terminal configured to receive the regulated output voltage, and an output terminal in communication with the second latch input terminal. The pulse module generates the off-time signal in response to the peak detect signal, the supply voltage and the output voltage. In one embodiment, the variable asserted duration of the off-time signal is substantially proportional to the inverse of the difference between the regulated output voltage and the input voltage.
In one embodiment, the circuit includes a driver module having an input terminal in communication with the latch output terminal and an output terminal in communication with the first input terminal of the current limit module and the switch control terminal. In another embodiment, the current limit module includes a limit switch and a limit comparator. The limit switch includes a control terminal in communication with the third input terminal of the current limit module, a first terminal configured to receive a reference current, and a second input terminal configured to receive a third reference voltage. The limit comparator includes first input terminal in communication with the first terminal of the limit switch, a second input terminal in communication with the second terminal of the current limit module, a reset terminal in communication with the first of the current limit module and an output terminal in communication with the current limit output terminal.
In another aspect, the circuit includes a feedback comparator, a pulse generation module, and a logic module. The feedback comparator includes a first input terminal configured to receive a regulated output voltage, a second input terminal configured to receive a first reference voltage, and an output terminal. The feedback comparator generates a comparison signal at its output terminal in response to the regulated output voltage. The pulse generation module includes an output terminal and provides an off-time signal with a first state at its output terminal. The first state has a dynamically determined duration. The logic module includes a first logic terminal in communication with the feedback comparator output terminal, a second logic module terminal in communication with the pulse generation module output terminal, and a charge control terminal. The logic module provides a charge signal at the charge control terminal in response to the comparison signal and the off-time signal.
Another aspect of the invention relates a method for generating a regulated output voltage. The method includes the steps of comparing the regulated output voltage and a reference voltage, and comparing an inductor current and a reference current. Additionally, the method includes the steps of charging an inductor if the regulated output voltage is less than the reference voltage and if the inductor current is less the reference current, and discharging the inductor for at least a minimum time if the inductor current increases to substantially equal to the reference current. In one embodiment, the minimum time is responsive to a supply voltage and the regulated output voltage. In a further embodiment, the minimum time is substantially proportional to the reciprocal of the difference between the regulated output voltage and the supply voltage.
In another aspect, the method includes the step of generating an off-time signal having a first state of an asserted duration and a second state. The method also includes the steps of charging an inductor if the regulated output voltage is less than a reference voltage and the off-time signal is not in the first state, and interrupting the charging of the inductor for at least the asserted duration if the off-time signal transitions from the second state to the first state. In one embodiment, the asserted duration is dynamically configured in response to the regulated output voltage and a supply voltage. In a further embodiment, the asserted duration is substantially proportional to the reciprocal of the difference between the output voltage and the supply voltage.